High-performance microprocessors and system on chips (SoCs) include multiple embedded memory arrays used as register files, low-level caches, etc that typically share the same power supply voltage as the core circuits of the microprocessor. The term “core” herein generally refers to non-peripheral circuits (i.e., non-I/O circuits) that are used for executing machine code. For example, floating point unit, execution unit, arithmetic logic unit, etc are part of the core.
As lower power consumption is becoming a performance benchmark for microprocessors and SoCs, the embedded memory arrays are designed to operate at a wide range of power supplies including the minimum operating voltage (Vmin). The higher end of the wide range of power supplies allow the embedded memory arrays to operate faster at the cost of higher power dissipation while the lower end of the wide range of power supplies allow the embedded memory arrays to operate at lower power dissipation, for example.
The term “minimum operating voltage (Vmin)” herein generally refers to the lowest operating power supply level at which a memory bit-cell can operate successfully for a given performance specification. The term “write Vmin (WVmin)” herein refers generally to the lowest operating power supply level at which a memory bit-cell is able to successfully complete a write operation within a predefined time period.
The WVmin can be reduced by up-sizing the transistors forming the memory cell i.e., by increasing W/L of write-access/pull-up devices of a memory bit-cell. However, such up-sizing increases the overall size of the memory arrays.